Espressif Systems /ESP32-C6 /EXTMEM /L2_CACHE_ACS_CNT_INT_RAW

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Interpret as L2_CACHE_ACS_CNT_INT_RAW

Description

Cache Access Counter Interrupt raw register

Fields

L2_IBUS0_OVF_INT_RAW	The raw bit of the interrupt of one of counters overflow that occurs in L2-Cache due to bus0 accesses L2-ICache0.
L2_IBUS1_OVF_INT_RAW	The raw bit of the interrupt of one of counters overflow that occurs in L2-Cache due to bus1 accesses L2-ICache1.
L2_IBUS2_OVF_INT_RAW	The raw bit of the interrupt of one of counters overflow that occurs in L2-Cache due to bus2 accesses L2-ICache2.
L2_IBUS3_OVF_INT_RAW	The raw bit of the interrupt of one of counters overflow that occurs in L2-Cache due to bus3 accesses L2-ICache3.
L2_DBUS0_OVF_INT_RAW	The raw bit of the interrupt of one of counters overflow that occurs in L2-Cache due to bus0 accesses L2-DCache.
L2_DBUS1_OVF_INT_RAW	The raw bit of the interrupt of one of counters overflow that occurs in L2-Cache due to bus1 accesses L2-DCache.
L2_DBUS2_OVF_INT_RAW	The raw bit of the interrupt of one of counters overflow that occurs in L2-Cache due to bus2 accesses L2-DCache.
L2_DBUS3_OVF_INT_RAW	The raw bit of the interrupt of one of counters overflow that occurs in L2-Cache due to bus3 accesses L2-DCache.

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